1. Field of the Invention
The present invention relates to a method of increasing thickness of an SOI (silicon on insulator) layer in an SOI structure wafer obtained by a method wherein an ion-implanted wafer is bonded to another wafer and a portion of the ion-implanted wafer is delaminated to provide an SOI wafer (the technique called a hydrogen ion delamination method, or a smart-cut method), and an SOI wafer produced by the method.
2. Description of the Related Art
One of typical method for producing an SOI wafer is a so-called wafer bonding method in which two mirror-polished silicon wafers are bonded together via an oxide film without use of adhesive, then subjected to a heat treatment (generally 1000.degree. C. to 1200.degree. C.) to increase a bonding strength, and one of the wafers is subsequently made thin.
In the wafer bonding method, thickness of one of the two wafers which are bonded to each other is made thin with grinding or etching to some extent, and then the surface thereof is subjected to a mechanochemical polishing to be finished to have an intended thickness of the SOI layer.
The SOI wafer fabricated according to the method has an advantage that crystallinity of the SOI layer and reliability of a buried oxide layer are as high as those of general silicon wafers. However, it has a disadvantage that thickness uniformity of the SOI layer achieved in the method is limited. Namely, only the uniformity in the surface of the intended thickness.+-.0.3 .mu.m can be achieved even if a highly precise processing method is used. Furthermore, there exists a problem of high production cost, since only one SOI wafer can be obtained from two silicon wafers.
Recently, a new method of fabricating an SOI wafer in which an ion-implanted wafer is bonded to another wafer and the wafers are then subjected to a heat treatment to be delaminated at an ion implanted layer (the technique called a hydrogen ion delamination method, or a smart-cut method) has been proposed in Japanese Patent Application Laid-Open (kokai) No. 5-211128. In this method, an oxide film is formed on the surface of at least one of two silicon wafers; hydrogen ions or rare gas ions are implanted into one surface of one of the two silicon wafers in order to form a fine bubble layer (enclosed layer) within the wafer; the ion-implanted silicon wafer is superposed on the other silicon wafer such that the ion-implanted surface comes into close contact with the surface of the other silicon wafer via the oxide film; heat treatment at 500.degree. C. or more is then performed to delaminate a portion of the ion-implanted wafer with using the fine bubble layer as a delaminating plane, so as to delaminate a thin film; and heat treatment at high temperature is further performed to firmly bond the wafers to each other, to thereby obtain an SOI wafer. According to the method, the SOI wafer having a thickness uniformity of .+-.0.01 .mu.m or less can be fabricated relatively easily.
A so-called thick layer SOI wafer which has a SOI layer having a thickness of several microns to tens microns is very useful for a bipolar device or a power device, and further development thereof is greatly expected.
The thick layer SOI wafer has been conventionally fabricated by the above-mentioned wafer bonding method, namely, by bonding a wafer having an oxide film and a bare wafer to each other, subjecting them to a bonding heat treatment at 1100.degree. C., and grinding and polishing them to provide a thick layer SOI wafer having a desired thickness. In the method, since the wafers are not bonded to each other in the peripheral part, it is necessary to perform an edge treatment step for removing the unbonded portion before polishing. Such a step makes the method complicate, and increases production cost. Furthermore, it is not possible to improve thickness uniformity of the SOI layer only by a polishing process, and therefore, a vapor phase etching treatment called PACE (Plasma Assisted Chemical Etching) disclosed in Japanese Patent Application Laid-Open (kokai) No. 5-160074 has been performed to make thickness uniform, and the mirror polishing has been performed to remove hazes or the like. When polishing is performed after the vapor phase etching as described above, thickness uniformity of the SOI layer may be rather deteriorated, latent flaws or a damage layer may be incorporated, and crystallinity may be lowered. Furthermore, processing cost is high also in that case.
On the other hand, the hydrogen ion delamination method are significantly advantageous in productivity and cost performance, since the edge treatment process which is essential in the above-mentioned wafer bonding method is not necessary.
However, only an SOI layer having a thickness of 2 .mu.m at most can be produced by the method, since the thickness of the SOI layer depends on a depth of ion implantation, which depends on an acceleration voltage of an ion implanter, and only about 200 keV of acceleration voltage at most is possible in high current ion implanter generally used for mass-production, because of limitation in the apparatus.
Accordingly, in order to form a thicker SOI layer by the hydrogen ion delamination method, the high current ion implanter which can provide a higher acceleration voltage is necessary. However, when the apparatus which can provide high acceleration voltage more than 200 keV is used, it takes long time to achieve a certain amount of ion implantation and thus cost is increased, since it is difficult to obtain high current by such an apparatus. Therefore, such an apparatus has not been used in mass-production. Furthermore, as in a PACE method, there is also a problem that a process such as polishing or the like is necessary in order to improve a surface roughness on the surface of SOI after delamination.